1. Field of the Invention
The present invention relates to serial buffers. More specifically, the present invention relates to an improved method for accessing on-chip resources of a serial buffer configured to implement a Lite-weight protocol.
2. Related Art
Serial buffers are typically used to implement an offload device, a data buffer or a pass-through FIFO. Some conventional serial buffers are configured to implement an advanced interface protocol, such as sRIO (serial rapid input/output), while other conventional serial buffers have been configured to implement less advanced protocols, such as SerialLite (as specified by FPGA maker Altera) and Aurora (as specified by FPGA maker Xilinx). These less advanced protocols are hereinafter referred to as Lite-weight protocols.
A Lite-weight protocol is characterized by a simplified protocol stack, which enables efficient data transfer with a low pin count, a low power requirement, a long cable length, and high performance. Lite-weight protocols use a packet format and a serial data stream. However, serial buffers configured to implement Lite-weight protocols require dedicated pins and circuitry to provide access to the on-chip resources of the serial buffer (e.g., registers, queues and/or buffer memory). This dedicated circuitry undesirably complicates the design and operation of the serial buffer.
It would therefore be desirable to have an improved method for accessing the on-chip resources of a serial buffer implementing a Lite-weight protocol. It would also be desirable for this improved method to be capable of implementing status and error reporting.